| Lab No. |
Lab Title |
Description |
| Lab1 |
Getting started lab |
You fill in the parts of a model
and run a simulation |
| Lab2 |
Adding Comments. |
You add single line and multi-line
comments to a file |
| Lab3 |
Identifiers |
You add identifiers to a model
and run a simulation |
| Lab4 |
Timescale and System Functions |
You experiment with timescale
and the $time function. |
| Lab5 |
Wires and Registers |
You will use the register and
wire data types. |
| Lab6 |
Time and Parallelism |
You will simulate a flop model
with two events happening in parallel |
| Lab7 |
Further Exploration of Time |
You will compare the $time, $stime,
and $realtime system functions |
| Lab8A |
Parameters |
You use parameters with the #
override method |
| Lab8B |
Parameters |
You use parameters with the defparam
override method. |
| Lab9 |
Named Events |
You will build and simulate a
model with two named events |
| Lab10 |
Ports |
You use the order and named schemes
for connecting ports when instantiating a model. |
| Lab11 |
Built in Primitives |
You will build and simulate the
logic called mash using built in primitives. |
| Lab12 |
Instantiating User Models |
You will instantiate two user
built models (mash), building and testing a new model mash2 |
| Lab13 |
Array of Instances |
You will build and simulate a
model using array of instances. |
| Lab14A |
Combinational UDP |
You will build and simulate the
UDP ujt_mux. |
| Lab14B |
Combinational UDP |
You will build and simulate the
UDP ujt_full_add_co. |
| Lab14C |
Combinational UDP |
You will build and simulate the
UDP ujt_full_add_sum. |
| Lab14D |
Combinational UDP |
You will build and simulate the
UDP ujt_andor. |
| Lab14E |
Combinational UDP |
You will build the jt_andoror
using two UDPs and a built in primitive. |
| Lab15A |
Sequential UDP |
You will build and simulate the
UDP ujt_dff_p. |
| Lab15B |
Sequential UDP |
You will build and simulate the
UDP ujt_lat_cl. |
| Lab15C |
Sequential UDP |
You will build and simulate the
UDP ujt_ff_rst_no. |
| Lab16A |
UDP Shorthand |
You will use shorthand to modify
and the simulate the udp jt_orandor. |
| Lab16B |
UDP Shorthand |
You will use shorthand to modify
and the simulate the udp ujt_ff_rst_no. |
| Lab17A |
Pessimism |
You will add lines to the udp
table for ujt_mux to account for pessimism. |
| Lab17B |
Pessimism |
You will add lines to the udp
table for ujt_dff to account for pessimism. |
| Lab18 |
Concurrency- Zero Event Delays |
You will experiment with a simulation
that runs forever. This lab shows you what not to do and explains
a common beginner problem. |
| Lab19 |
Timing Controls - @ |
You will build and simulate the
model jt_dff using the @ timing control |
| Lab20 |
Timing Controls - # |
You will build and simulate the
model jt_dff using the # and@ timing controls |
| Lab21 |
Timing Controls -
wait |
You will build and
simulate the model jt_latch using the wait timing control |
| Lab22 |
Named Event |
You will experiment with name
events in the model jt_sub_rem. |
| Lab23 |
Event or |
You will build and simulate the
model jt_mux22 using the event or control. |
| Lab24 |
Continuous Assignments |
You will build and simulate the
model jt_cont_orand using the continuos assignment construct. |
| Lab25 |
Non-blocking Assignments |
You will build and simulate the
same logic using a non-blocking assignment and a blocking
assignment. |
| Lab26 |
if else if |
You will build the model jt_muxif,
which make use of the if else if constructs |
| Lab27 |
Forever |
You will build and simulate the
model jt_20clk, which makes use of the forever construct. |
| Lab28 |
Repeat |
You will build and simulate the
model jt_dff_repeat, which makes use of the repeat construct. |
| Lab29 |
While |
You will build and simulate the
model jt_count_ones, which makes use of the while construct. |
| Lab30 |
For |
You will build and simulate the
model jt_dff_for, which makes use of the for looping
construct. |
| Lab31 |
Branching (if else if) |
You will build and simulate the
model jt_compare, which makes use of the if else if construct.
This is a second lab to use the if else if construct. It has
slightly different take. |
| Lab32 |
Branching (case) |
You will build and simulate the
model jt_kase, which makes use of the case construct. |
| Lab33 |
Branching (casez) |
You will build and simulate the
model jt_kasez, which makes use of the casez construct. |
| Lab34 |
Branching (casex) |
You will build and simulate the
model jt_kasex, which makes use of the casex construct. |
| Lab35 |
Tasks |
You will build and simulate the
model jt_tsk, which makes use of a user defined task. |
| Lab36 |
Functions |
You will build and simulate the
model jt_funcadd, which makes use of a user defined function. |
| Lab37 |
Named Blocks |
You will build and simulate the
model jt_counter_namedbloc, which makes use of the named block
construct. |
| Lab38 |
Sequential and Parallel Blocks |
You will build and simulate the
model jt_muxif with two versions of the the test file top_p.v
and top_s.v. One using a parallel block and one using a sequential
block. |
| Lab39 |
Bidirs |
You will simulate the model jt_ram,
which makes use of bi-directional ports. |
| Lab40 |
Modeling A RAM |
You will build and simulate the
model jt_ram2 |
| Lab41 |
Modeling A ROM |
You will build and simulate the
model jt_rom2, which makes use of the $readmemb system
task.. |
| Lab42 |
Arithmetic Ops |
You will build and simulate the
model jt_arithops, which makes use of a arithmetic operators. |
| Lab43 |
Bit Wise Ops |
You will build and simulate the
model jt_bitwise, which makes use of a bitwise operators. |
| Lab44 |
Logical Ops |
You will build and simulate the
model jt_logical, which makes use of a logical operators. |
| Lab45 |
Reduction Ops |
You will build and simulate the
model jt_reduction, which makes use of a reduction operators. |
| Lab46 |
Shift Ops |
You will build and simulate the
model jt_shift, which makes use of a shift operators. |
| Lab47 |
Relational Ops |
You will build and simulate the
model jt_relate, which makes use of a relational operators. |
| Lab48 |
Equality/Identity Ops |
You will build and simulate the
models jt_ident and jt_equal, which makes use of a equality
operators. |
| Lab49 |
Conditional Ops |
You will build and simulate the
model jt_8mux_cond, which makes use of a conditional operator. |
| Lab50 |
Concatenation Ops |
You will build and simulate the
model jt_concat8, which makes use of a concatenation operator. |
| Lab51 |
Replication Ops |
You will build and simulate the
models jt_replicate and jt_replicate2, which make use
of a replication operator. |
| Lab52A |
Lumped/Distributed Delay |
You will build and simulate the
model jt_or3, which has a lumped delay in it. |
| Lab52B |
Lumped/Distributed Delay |
You will build and simulate the
model jt_bufchain, which has distributed delays in it. |
| Lab52C |
Lumped/Distributed Delay |
You will build and simulate the
model jt_and_dist, which has distributed delays in it. |
| Lab53 |
Specify Blocks |
You will build and simulate the
model jt_andor53, which uses a specify block for its path delays.
|
| Lab54A |
Module Path Delays |
You will build and simulate the
model jt_bufchain_en
which has full and parallel path delays. |
| Lab54B |
Module Path Delays |
You will build and
simulate the model jt_andor_paths
which has full and parallel path delays. |
| Lab55 |
SDPD |
You will build and simulate the
model jt_xor which has state
dependent path delays in it. |
| Lab56 |
Inertial Delay |
You will experiment with the palse
swallowing that occurs when you have a pulse smaller than the instrinsic
gate delay. |
| Lab57A |
Timing Check-setup |
You will build and simulate the
model jt_dff_setup, which has a setup check in it. |
| Lab57B |
Timing Check-hold |
You will build and simulate the
model jt_dff_hold, which has a hold check in it. |
| Lab57C |
Timing Check-setuphold |
You will build and simulate the
model jt_dff_checks, which has a setuphold check in it. |
| Lab57D |
Timing Check-recovery |
You will build and simulate the
model jt_dff_recovery, which has a recovery check in it. |
| Lab57E |
Timing Check-removal |
You will build and simulate the
model jt_dff_removal, which has a removal check in it. |
| Lab57F |
Timing Check-recrem |
You will build and simulate the
model jt_dff_recrem, which has a recrem check in it. |
| Lab57G |
Timing Check-period |
You will build and simulate the
model jt_dff_period, which has a period check in it. |
| Lab57H |
Timing Check-width |
You will build and simulate the
model jt_dff_width, which has a width check in it. |
| Lab57I |
Timing Check-skew |
You will build and simulate the
model jt_dff_skew, which has a skew check in it. |
| |
Synthesis Modeling Labs |
|
| Lab58 |
Continuous Assignment |
In this lab you will model the
jt_andorand_cont with continuous assignment legal for synthesis.
|
| Lab59 |
Procedural Blocks |
In this lab you will model the
jt_andorand_proc with a procedural block legal for
synthesis. |
| Lab60 |
Sensitivity Lists |
In this lab you will model the
jt_mux2_sens, learning about sensitivity list and how they
effect synthesis. |
| Lab61 |
Inferring Latches |
In this lab you will build the
jt_infer_latch which uses a procedural block with an if statement
to infer a latch in synthesis. |
| Lab62 |
case |
In this lab you will model and
simulate the jt_41mux_case, a 4 to 1 mux using a case statement
that is legal for synthesis. |
| Lab63 |
if else if |
In this lab you will model and
simulate the jt_41mux_if, a 4 to 1 mux using if else
if statements that is legal for synthesis. |
| Lab64 |
conditional operators |
In this lab you will model and
simulate the jt_41mux_condop, a 4 to 1 mux using the conditional
operator that is legal for synthesis. |
| Lab65 |
Functions |
In this lab you will model the
model jt_andorand_func using a function that is legal for synthesis. |
| Lab66 |
Blocking VS Non-Blocking Assignments |
In this lab you will model both
the jt_dff_bloc and jt_dff_non_bloc, which are different
only in the assignment type (blocking Vs non blocking). |
| Lab67A |
Resets |
In this lab you will model the
jt_dff_async_rst which has an asynchronous reset |
| Lab67B |
Resets |
In this lab you will model the
jt_latch_async_rst which has an asynchronous reset |
| Lab67C |
Resets |
In this lab you will model the
jt_dff_sync_rst which has an synchronous reset |
| Lab67D |
Resets |
In this lab you will model the
jt_latch_sync_rst which has an synchronous reset |
| Lab68A |
FSMs |
In this lab you will model and
simulate the jt_two_state_machine, a 2 state 2block explicit
finite state machine. |
| Lab68B |
FSMs |
In this lab you will model and
simulate the jt_four_state_machine, a 4 state 2block explicit
finite state machine. |
| Lab69 |
Pragmas-Full Case |
In this lab you will model and
simulate the jt_31mux_case_directive, which makes use of the
full case synthesis directive. |
